1. Field of the Invention
The present invention relates to a signal processing apparatus having a noise removing circuit, a signal processing apparatus for outputting individual signals of a plurality of signal sources and at least the maximum and minimum signals from a plurality of signal sources, and an image pickup apparatus using the signal processing apparatus.
2. Related Background Art
FIG. 1 is a signal processing apparatus for sequentially outputting signals.
Referring to FIG. 1, signals S1, S2, . . . , Sn are sequentially output to an output line 102 through a non-inverting output circuit (voltage follower circuit) 103 by controlling a MOS transistor 101 by a shift register 100.
FIG. 2 shows a photoelectric conversion apparatus having a noise removing circuit.
An amplified photoelectric conversion apparatus is disadvantageous because of large noise generated in pixels and therefore requires a noise removing circuit. Examples of amplified photoelectric conversion apparatus are a BASIS and CMOS sensor. Although FIG. 2 shows a CMOS sensor having a two-dimensional array of photoelectric conversion elements 70, even if the sensor is a linear sensor or a BASIS sensor, a same noise removing circuit is used in those sensors.
Referring to FIG. 2, the photoelectric conversion apparatus includes horizontal driving lines 71 for controlling lines, vertical output lines 72 for outputting pixel outputs to a noise removing circuit 74, amplified MOS transistors 73 of the pixels 70, load MOS transistors, and a constant current source. The noise removing circuit 74 is generally called an S-N noise removing circuit and comprises capacitances CTN 77 for storing N charges, capacitances CTS 78 for storing S charges, switch MOS transistors 75 and 76 for the capacitances, and horizontal driving MOS transistors 79 and 80 driven by a horizontal scanning circuit 85. An S signal and N signal are input to a differential amplifier 84 through voltage follower circuits 82 and 83, respectively, to remove noise and are output from the noise removing circuit. Let VP be the optical output from the pixel 70, VN be noise, CT be the storage capacitance value, and CH be the parasitic capacitance of the horizontal output line. Then, a final output VOUT is given by       V    out    =                              C          T                                      C            T                    +                      C            H                              ⁢              {                              (                                          V                P                            +                              V                N                                      )                    -                      V            N                          }              =                            C          T                                      C            T                    +                      C            H                              ⁢              V        P            
However, the prior arts have the following problems.
In the prior art shown in FIG. 1, since a signal is output through the non-inverting output circuit, the noise signal (e.g., offset signal) from the non-inverting output circuit is added and output together with the signal.
The prior art shown in FIG. 2 has the following problems:
(1) Since two large MOS capacitances are formed, the chip area increases. Especially, as the device shrinks in feature size, most area is occupied by the MOS capacitances, resulting in a serious problem.
(2) When the S capacitance value shifts from the N capacitance value, the noise correction effect degrades (variation in CT)
(3) The sensitivity decreases to CT/(CT+CH) because of the capacitance division ratio of the storage capacitance to the parasitic capacitance.
It is the first object of the present invention to read out an accurate signal free from noise.
It is the second object of the present invention to reduce the chip area.
In order to achieve the above object, according to an aspect of the present invention, there is provided a signal processing apparatus comprising a signal source, a non-inverting output circuit for outputting a signal from the signal source, and noise signal removal means for, when the signal from the signal source is output from the non-inverting output circuit, removing a noise signal in the non-inverting output circuit and causing the non-inverting output circuit to output the signal from the signal source.
According to another aspect, there is provided a signal processing apparatus comprising a signal source, arithmetic means for performing an arithmetic operation, and a non-inverting output circuit for outputting a signal from the arithmetic means, wherein the arithmetic means including at least transfer means for transferring a signal from the signal source to the non-inverting output circuit, and difference signal formation means for forming a difference signal obtained by subtracting a signal from the non-inverting output circuit from the signal from the signal source.
According to still another aspect, there is provided a signal processing apparatus comprising a plurality of signal sources, a non-inverting output circuit for outputting signals from the plurality of signal sources, specific value signal output means for causing the non-inverting output circuit to output a maximum or minimum signal of at least two of the plurality of signal sources, and noise signal removal means for, when the signal from the signal source is output from the non-inverting output circuit, removing noise signal in the non-inverting output circuit and causing the non-inverting output circuit to output the signal from the signal sources.
According to still another aspect, there is provided a signal processing apparatus comprising a plurality of signal sources, specific value detection means for outputting a maximum or minimum signal of the plurality of signal sources, the specific value detection means having a function of sequentially outputting individual signals from the plurality of signal sources, and driving means for switching the function of the specific value detection means.
According to still another aspect, there is provided a signal processing apparatus comprising a plurality of signal sources, maximum detection means for outputting a maximum signal of the plurality of signal sources, minimum detection means for outputting a minimum signal of the plurality of signal sources, the maximum or minimum detection means having a function of sequentially outputting individual signals from the plurality of signal sources, and driving means for switching the function of the maximum or minimum detection means having the function of sequentially outputting the individual signals.